January 27, 2022

Excessive Excessive-Efficiency at Excessive Voltages


TSMC this week introduced a brand new fabrication course of that’s tailor-made particularly for high-performance computing (HPC) merchandise. N4X guarantees to mix transistor density and design guidelines of TSMC’s N5-family nodes with the power to drive chips at additional excessive voltages for larger frequencies, which will likely be notably helpful for server CPUs and SoCs. Curiously, TSMC’s N4X can probably allow larger frequencies than even the corporate’s next-generation N3 course of.

One of many issues that’s brought on by shrinking sizes of transistors is shrinking sizes of their contacts, which suggests elevated contact resistance and consequent issues with energy supply. Numerous producers use other ways of tackling the contact resistance subject: Intel makes use of cobalt contacts as an alternative of tungsten contacts, whereas different makers opted to forming contacts utilizing selective tungsten deposition expertise. Whereas these strategies work completely for just about all types of chips, there are nonetheless methods to additional enhance energy supply for high-performance computing (HPC) designs, that are comparatively conceited concerning the complete about of energy/voltage getting used. That is precisely what TSMC did to its N4X node. However earlier than we proceed to particulars about the brand new fabrication course of, allow us to see what benefits TSMC guarantees with it. 

TSMC claims that its N4X node can allow as much as 15% larger clocks in comparison with an identical circuit made utilizing N5 in addition to an as much as 4% larger frequency in comparison with an IC produced utilizing its N4P node whereas operating at 1.2V. Moreover – and seemingly extra vital – N4X can obtain drive voltages past 1.2V to get even larger clocks. To place the numbers into context: Apple’s M1 household SoCs made at N5 run at 3.20 GHz, but when these SoCs have been produced utilizing N4X, then utilizing TSMC’s math they might theoretically be pushed to round 3.70 GHz or at a good larger frequency at voltages past 1.2V.

TSMC doesn’t evaluate transistor density of N4X to different members of its N5 household, however usually processors and SoCs for HPC purposes are usually not designed utilizing high-density libraries. As for energy, drive voltages of over 1.2V will naturally enhance energy consumption in comparison with chips produced utilizing different N5-class nodes, however because the node is designed for HPC/datacenter purposes, its focus is to supply the best efficiency doable with energy being a secondary concern. The truth is, complete energy consumption has been rising on HPC-class GPUs and comparable components for the final couple of generations now, and there’s no signal this may cease within the subsequent couple of generations of merchandise, thanks partially to N4X.

“HPC is now TSMC’s fastest-growing enterprise phase and we’re proud to introduce N4X, the primary within the ‘X’ lineage of our excessive efficiency semiconductor applied sciences,” mentioned Dr. Kevin Zhang, senior vp of Enterprise Growth at TSMC. “The calls for of the HPC phase are unrelenting, and TSMC has not solely tailor-made our ‘X’ semiconductor applied sciences to unleash final efficiency however has additionally mixed it with our 3DFabric superior packaging applied sciences to supply one of the best HPC platform.”










Marketed PPA Enhancements of New Course of Applied sciences

Information introduced throughout convention calls, occasions, press briefings and press releases
  TSMC
N5

vs

N7
N5P

vs

N5
N5HPC

vs

N5
N4

vs

N5
N4P

vs

N5
N4P

vs

N4
N4X

vs

N5
N4X

vs

N4P
N3

vs

N5
Energy -30% -10% ? decrease -22% ? ? -25-30%
Efficiency +15% +5% +7% larger +11% +6% +15%

or

extra
+4%

or extra
+10-15%
Logic Space

Discount %

(Density)

0.55x

-45%

(1.8x)

0.94x

-6%

1.06x

0.94x

-6%

1.06x

?

?

0.58x

-42%

(1.7x)

Quantity

Manufacturing
Q2 2020 2021 Q2 2022 2022 2023 H2 2022 H1

2024?
H1 2024? H2 2022

In a bid to extend efficiency and make drive voltages of over 1.2V doable, TSMC needed to evolve all the course of stack.

  • First, it redesigned its FinFET transistors and optimized them each for top clocks and excessive drive currents, which in all probability means decreasing resistance and parasitic capacitance and boosting the present circulation by way of the channel. We have no idea whether or not it needed to enhance gate-to-gate pitch spacing and at this level TSMC doesn’t say what precisely it did and the way it affected transistor density.
  • Secondly, it launched new high-density metal-insulator-metal (MiM) capacitors for secure energy supply beneath excessive hundreds.
  • Thirdly, it redesigned back-end-of-line steel stack to ship extra energy to transistors. Once more, we have no idea how this affected transistor density and in the end die sizes.

To a big diploma, Intel launched comparable enhancements to its 10nm Enhanced SuperFin (now known as Intel 7) course of expertise, which isn’t shocking as these are pure strategies of accelerating frequency potential.

What’s spectacular is how considerably TSMC managed to extend clock velocity potential of its N5 expertise over time. A 15% enhance places N4X near its next-generation N3 fabrication expertise. In the meantime, with drive voltages past 1.2V, this node will really allow larger clocks than N3, making it notably good for datacenter CPUs.

TSMC says that expects the primary N4X designs to enter threat manufacturing by the primary half of 2023, which is a really obscure description of timing, as it might imply very late 2022 or early 2023. In any case, it often takes a yr for a chip to proceed from threat manufacturing to high-volume manufacturing iteration, so it’s affordable to anticipate the primary N4X designs to hit the market in early 2024. That is maybe a weak spot of N4X as by the point its N3 will likely be totally ramped and whereas N4X guarantees to have an edge by way of clocks, N3 could have a significant benefit by way of transistor density.

Supply: TSMC

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